404 kW in 1.76 litres — a sealed brick of forty liquid-cooled silicon tiers, about 2,900× the density of a rack. Remove the rack and the ceiling on model size moves from the machine to the grid.
Adding racks adds capacity, never capability: a gigawatt of boards and cables trains the same ≈1.5 T model that 100 MW does. Take the rack out and the whole site becomes one machine.
Forty silicon interposer tiers bonded into one sealed block. Water runs through channels etched in the silicon, 140 V comes down a spine through its centre, and light leaves from benches along its edges. Five connections — coolant in and out, power, ground, fiber — replace the hundreds of connectors a rack of boards needs.
Thirty-two bricks slide into a frame the size of a rack. Liquid and 140 VDC arrive from above on a central drop and two laminated busbars; each bay's electrodes clamp the busbar laminae straight onto the brick's top and bottom plates. Fibers leave the front and the back. Nothing converts in the frame — it is copper, not electronics.
Seventy-seven frames, plus spares, on a floor about ten metres by seven, every frame wired to every other. Each brick's fibers run through a passive shuffle to any other brick in the room — point to point, no switch, provisioned rather than routed. Some seven million chiplets sit a few tens of nanoseconds from each other and act as one machine, which is what a rack could only offer to seventy-two accelerators.
A rack-built site trains the same ≈1.5 T-parameter model whether it draws 100 MW or a gigawatt, because the coherent domain ends at the rack. With the rack gone the whole site is one domain, and the largest trainable model is set by the power the grid delivers — about 8 T dense per gigawatt, petabyte-class coherent memory for mixture-of-experts totals near a thousand trillion.
| Construction | 40 bonded silicon interposer tiers, ~100 × 200 mm at 2.2 mm pitch |
|---|---|
| Envelope · mass | 1.76 L, 88 mm stack · ≈6.25 kg |
| Power · density | 404 kW · ~230 kW/L |
| Channels | 200 µm in-silicon microchannels, h_eff ≈ 45 kW/m²K |
|---|---|
| Sustained die flux | ≈145 W/cm², double-sided |
| Coolant | Treated water, warm-water loop, ≈2–3 % overhead |
| Distribution | 140 VDC to the frame busbar, nothing converts in the rack |
|---|---|
| Spine | TSV-in-silicon, ≈15 µΩ over 88 mm |
| Conversion | Per-tier switched-capacitor ladder, η ≈ 90–93 % |
| Escape bandwidth | 12.8 Tb/s per tier · 512 Tb/s per brick |
|---|---|
| Fiber alignment | ±24 µm passive, expanded beam |
| Room | Point-to-point fiber, ~35 ns across ~7 m, no taper |
White Matter is at concept feasibility, sizing grade. The numbers on this page are first-order engineering estimates computed from stated assumptions, not measurements of built hardware; the whitepaper shows every calculation inline.
Talk to our packaging engineers about hosting your silicon in the brick, or about what a site looks like once the rack is gone.
Thermal, power and optical budgets against your own die and workload.
Interposer, microchannel and hybrid-bond development with a partner line.
Power, cooling and floor plan once compute stops filling the hall.